This result has been submitted to SPEC, see the disclaimer before studying any results.
If you wish to print this information we highly recommend using the postscript reporting page.
SPECfp_rate95 | 2077 |
---|---|
SPECfp_rate_base95 | 1967 |
Benchmark # and Name | Base # Copies | Base Run Time | Base SPEC Ratio | Peak # Copies | Peak Run Time | Peak SPEC Ratio |
---|---|---|---|---|---|---|
101.tomcatv | 16 | 254 | 2099 | 16 | 292 | 1826 |
102.swim | 16 | 475 | 2608 | 16 | 359 | 3447 |
103.su2cor | 16 | 162 | 1248 | 16 | 150 | 1341 |
104.hydro2d | 16 | 277 | 1246 | 16 | 295 | 1170 |
107.mgrid | 16 | 183 | 1964 | 16 | 178 | 2021 |
110.applu | 16 | 239 | 1326 | 16 | 234 | 1354 |
125.turb3d | 16 | 407 | 1452 | 16 | 339 | 1742 |
141.apsi | 16 | 139 | 2169 | 16 | 132 | 2286 |
145.fpppp | 16 | 363 | 3809 | 16 | 322 | 4293 |
146.wave5 | 16 | 132 | 3262 | 16 | 134 | 3236 |
SPECfp_rate_base95 | 1967 | |||||
SPECfp_rate95 | 2077 |
Tester Information:
SPEC License #: | 04 |
---|---|
Tested By: | SGI |
Test Date: | Nov-96 |
Hardware Avail: | Nov-96 |
Software Avail: | Nov-96 |
Hardware Information:
Model Name: | origin2000 |
---|---|
CPU: | 195 MHz MIPS R10000 Processor Chip Revision: 2.6 |
FPU: | MIPS R10010 Floating Point Chip Revision: 0.0 |
Number of CPU(s): | 16 |
Primary Cache: | 32KBI+32KBD |
Secondary Cache: | 4MB(I+D) |
Other Cache: | None |
Memory: | 1408 MB |
Disk Subsystem: | 4 SCSI 4GB, striped |
Other Hardware: | None |
Software Information:
Operating System: | IRIX64 6.4 |
---|---|
Compiler: | MipsPRO 7.1 |
KAP | |
File System: | XFS |
System State: | Multi-User |
Notes:
Base Flags: -Ofast -LNO:fusion=2 Peak Flags: tomcatv: -O3 -n32 -mips4 -LNO:prefetch_ahead=1:pf1=off -OPT:IEEE_arithmetic=3:reorg_common=ON -TENV:X=4 swim: -O3 -n32 -mips4 -Wl,-ivpad -LNO:fusion=2:ou_max=1 -TENV:X=4 -OPT:IEEE_arithmetic=3:reorg_common=ON su2cor: -O3 -n32 -mips4 -TENV:X=3 -OPT:ro=3:IEEE_arith=3:unroll_times_max=2:unroll_size=0:unroll_analysis=off . -LNO:prefetch=0:fusion=2 -pfa2 -mp hydro2d: -O3 -mips4 -n32 -TENV:X=4 -OPT:ro=3:IEEE_arith=3:reorg_common=on -LNO:prefetch=2:fusion=2:blocking=off -IPA mgrid: -O3 -n32 -mips4 -LNO:fusion=2:prefetch=2:prefetch_ahead=1 applu: -O3 -n32 -mips4 -IPA -OPT:ro=3:div_split -LNO:fission=0:fusion=2 -CG:ld_latency=5 turb3d: -O3 -64 -mips4 -OPT:pad_common:ro=3:IEEE_arith=3 -Wl,-ivpad -LNO:pf2=0:interchange=OFF:cs2=4m . -OPT:unroll_times_max=2:reorg_common=ON -CG:ld_latency=3 apsi: -O3 -n32 -mips4 -IPA -OPT:div_split -LNO:fusion=2:prefetch=0:interchange=off fpppp: -O2 -n32 -mips4 -v6 -TARG:processor=t5 -OPT:fold_arith_limit=4000 -WK,-so=1,-r=2,-o=2 -lfastm wave5: -Ofast -LNO:fusion=2:fission=2:prefetch=1:prefetch_ahead=2 -OPT:reorg_common=on
Go To: [Home] [OSG] [CPU95] [Results]
This page was generated with rawformat (cd01-open).
[email protected] Wed Dec 18 18:01:39 PST 1996First published at SPEC.org on 10-Dec-1996