SPECint_rate95

Siemens Nixdorf Informationssysteme

PCE-5Smp

This result has been submitted to SPEC, see the disclaimer before studying any results.

If you wish to print this information we highly recommend using the postscript reporting page.


SPECint_rate95 36.4
SPECint_rate_base95 36.4

Benchmark # and Name Base # Copies Base Run Time Base SPEC Ratio Peak # Copies Peak Run Time Peak SPEC Ratio
099.go198642.0198642.0
124.m88ksim145038.0145038.0
126.gcc141636.8141636.8
129.compress159227.4159227.4
130.li140941.8140941.8
132.ijpeg183625.8183625.8
134.perl138943.9138943.9
147.vortex159940.6159940.6
SPECint_rate_base95 36.4
SPECint_rate95 36.4

Tester Information:
SPEC License #: 22
Tested By: SNI, Augsburg / Germany
Test Date: Mar-96
Hardware Avail: Oct-95
Software Avail: Feb-96

Hardware Information:
Model Name: PCE-5Smp
CPU: 133 MHz Pentium
FPU: Integrated
Number of CPU(s): 1
Primary Cache: 8KBI+8KBD on chip
Secondary Cache: 2MB(I+D) off chip
Other Cache: None
Memory: 512MB
Disk Subsystem: 3 x 2 GB
Other Hardware: Mylex DAC960

Software Information:
Operating System: Unixware 2.1
Compiler: Intel Reference Compiler 2.2 Beta
File System: UFS,VXFS
System State: Single User

Notes:

Compiled by Intel
Base and peak flags are the same and use Feedback Directed Optimization
Pass1: -tp p5 -ipo -prof_gen -ircdb_dir /tmp/IRCDB -dn
Pass2: -tp p5 -ipo -prof_use -ircdb_dir /tmp/IRCDB -dn
-ircdb_dir is a location flag and not an optimization flag
Portability: 124: -DSYSV -DLEHOST 130, 134, 147: -lm  132: -DSYSV  126: -lm -lc -L/usr/ucblib -lucb -lmalloc





Go To: [Home] [OSG] [CPU95] [Results]

This page was generated with rawformat (cd01-open).

[email protected]
Tue May 14 17:03:48 PDT 1996

First published at SPEC.org on 14-May-1996


Copyright (c) 1996 Standard Performance Evaluation Corporation