SPEC CPU(R)2017 Floating Point Speed Result Dell Inc. PowerEdge C6520 (Intel Xeon Silver 4316, 2.30 GHz) CPU2017 License: 55 Test date: May-2021 Test sponsor: Dell Inc. Hardware availability: Apr-2021 Tested by: Dell Inc. Software availability: Dec-2020 Base Base Base Peak Peak Peak Benchmarks Threads Run Time Ratio Threads Run Time Ratio --------------- ------- --------- --------- ------- --------- --------- 603.bwaves_s 40 102 577 S 40 103 572 * 603.bwaves_s 40 103 572 * 40 103 573 S 607.cactuBSSN_s 40 86.7 192 S 40 86.7 192 S 607.cactuBSSN_s 40 87.2 191 * 40 87.2 191 * 619.lbm_s 40 47.1 111 * 40 47.1 111 * 619.lbm_s 40 45.3 116 S 40 45.3 116 S 621.wrf_s 40 95.3 139 S 40 89.6 148 * 621.wrf_s 40 96.9 137 * 40 88.8 149 S 627.cam4_s 40 82.3 108 S 40 82.3 108 S 627.cam4_s 40 82.7 107 * 40 82.7 107 * 628.pop2_s 40 152 78.4 * 40 152 78.4 * 628.pop2_s 40 151 78.8 S 40 151 78.8 S 638.imagick_s 40 110 131 S 40 110 131 S 638.imagick_s 40 110 131 * 40 110 131 * 644.nab_s 40 66.2 264 * 40 58.8 297 S 644.nab_s 40 66.2 264 S 40 58.9 297 * 649.fotonik3d_s 40 90.6 101 * 40 90.6 101 * 649.fotonik3d_s 40 89.8 101 S 40 89.8 101 S 654.roms_s 40 98.8 159 * 40 98.8 159 * 654.roms_s 40 96.9 163 S 40 96.9 163 S ================================================================================= 603.bwaves_s 40 103 572 * 40 103 572 * 607.cactuBSSN_s 40 87.2 191 * 40 87.2 191 * 619.lbm_s 40 47.1 111 * 40 47.1 111 * 621.wrf_s 40 96.9 137 * 40 89.6 148 * 627.cam4_s 40 82.7 107 * 40 82.7 107 * 628.pop2_s 40 152 78.4 * 40 152 78.4 * 638.imagick_s 40 110 131 * 40 110 131 * 644.nab_s 40 66.2 264 * 40 58.9 297 * 649.fotonik3d_s 40 90.6 101 * 40 90.6 101 * 654.roms_s 40 98.8 159 * 40 98.8 159 * SPECspeed(R)2017_fp_base 154 SPECspeed(R)2017_fp_peak 157 HARDWARE -------- CPU Name: Intel Xeon Silver 4316 Max MHz: 3400 Nominal: 2300 Enabled: 40 cores, 2 chips Orderable: 1,2 chips Cache L1: 32 KB I + 48 KB D on chip per core L2: 1.25 MB I+D on chip per core L3: 30 MB I+D on chip per chip Other: None Memory: 1 TB (16 x 64 GB 2Rx4 PC4-3200AA-R, running at 2666) Storage: 125 GB on tmpfs Other: None SOFTWARE -------- OS: Red Hat Enterprise Linux 8.2 (Ootpa) 4.18.0-193.el8.x86_64 Compiler: C/C++: Version 2021.1 of Intel oneAPI DPC++/C++ Compiler Build 20201113 for Linux; Fortran: Version 2021.1 of Intel Fortran Compiler Classic Build 20201112 for Linux; C/C++: Version 2021.1 of Intel C/C++ Compiler Classic Build 20201112 for Linux Parallel: Yes Firmware: Version 1.1.3 released Apr-2021 File System: tmpfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 64-bit Other: jemalloc memory allocator V5.0.1 Power Management: BIOS and OS set to prefer performance at the cost of additional power usage. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Environment Variables Notes --------------------------- Environment variables set by runcpu before the start of the run: KMP_AFFINITY = "granularity=fine,compact" LD_LIBRARY_PATH = "/mnt/ramdisk/cpu2017-1.1.7-ic2021.1/lib/intel64:/mnt/ramdisk/cpu2017-1. 1.7-ic2021.1/je5.0.1-64" MALLOC_CONF = "retain:true" OMP_STACKSIZE = "192M" General Notes ------------- Binaries compiled on a system with 1x Intel Core i9-7980XE CPU + 64GB RAM memory using Redhat Enterprise Linux 8.0 NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches jemalloc, a general purpose malloc implementation built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases Benchmark run from a 125 GB ramdisk created with the cmd: "mount -t tmpfs -o size=125G tmpfs /mnt/ramdisk" Platform Notes -------------- BIOS Settings: Logical Processor : Disabled Virtualization Technology : Disabled System Profile : Custom CPU Power Management : Maximum Performance C1E : Disabled C States : Autonomous Memory Patrol Scrub : Disabled Energy Efficiency Policy : Performance CPU Interconnect Bus Link Power Management : Disabled Sysinfo program /mnt/ramdisk/cpu2017-1.1.7-ic2021.1/bin/sysinfo Rev: r6538 of 2020-09-24 e8664e66d2d7080afeaa89d4b38e2f1c running on localhost.localdomain Fri May 21 00:27:43 2021 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Silver 4316 CPU @ 2.30GHz 2 "physical id"s (chips) 40 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 20 siblings : 20 physical 0: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 physical 1: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 From lscpu: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 40 On-line CPU(s) list: 0-39 Thread(s) per core: 1 Core(s) per socket: 20 Socket(s): 2 NUMA node(s): 2 Vendor ID: GenuineIntel CPU family: 6 Model: 106 Model name: Intel(R) Xeon(R) Silver 4316 CPU @ 2.30GHz Stepping: 6 CPU MHz: 1819.428 BogoMIPS: 4600.00 Virtualization: VT-x L1d cache: 48K L1i cache: 32K L2 cache: 1280K L3 cache: 30720K NUMA node0 CPU(s): 0-19 NUMA node1 CPU(s): 20-39 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 invpcid_single ssbd mba ibrs ibpb stibp ibrs_enhanced tpr_shadow vnmi flexpriority ept vpid fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm rdt_a avx512f avx512dq rdseed adx smap avx512ifma clflushopt clwb intel_pt avx512cd sha_ni avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local wbnoinvd dtherm ida arat pln pts avx512vbmi umip pku ospke avx512_vbmi2 gfni vaes vpclmulqdq avx512_vnni avx512_bitalg tme avx512_vpopcntdq la57 rdpid md_clear pconfig flush_l1d arch_capabilities /proc/cpuinfo cache data cache size : 30720 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 2 nodes (0-1) node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 node 0 size: 515458 MB node 0 free: 505623 MB node 1 cpus: 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 node 1 size: 516088 MB node 1 free: 509527 MB node distances: node 0 1 0: 10 20 1: 20 10 From /proc/meminfo MemTotal: 1056303836 kB HugePages_Total: 0 Hugepagesize: 2048 kB /sbin/tuned-adm active Current active profile: throughput-performance From /etc/*release* /etc/*version* os-release: NAME="Red Hat Enterprise Linux" VERSION="8.2 (Ootpa)" ID="rhel" ID_LIKE="fedora" VERSION_ID="8.2" PLATFORM_ID="platform:el8" PRETTY_NAME="Red Hat Enterprise Linux 8.2 (Ootpa)" ANSI_COLOR="0;31" redhat-release: Red Hat Enterprise Linux release 8.2 (Ootpa) system-release: Red Hat Enterprise Linux release 8.2 (Ootpa) system-release-cpe: cpe:/o:redhat:enterprise_linux:8.2:ga uname -a: Linux localhost.localdomain 4.18.0-193.el8.x86_64 #1 SMP Fri Mar 27 14:35:58 UTC 2020 x86_64 x86_64 x86_64 GNU/Linux Kernel self-reported vulnerability status: CVE-2018-12207 (iTLB Multihit): Not affected CVE-2018-3620 (L1 Terminal Fault): Not affected Microarchitectural Data Sampling: Not affected CVE-2017-5754 (Meltdown): Not affected CVE-2018-3639 (Speculative Store Bypass): Mitigation: Speculative Store Bypass disabled via prctl and seccomp CVE-2017-5753 (Spectre variant 1): Mitigation: usercopy/swapgs barriers and __user pointer sanitization CVE-2017-5715 (Spectre variant 2): Mitigation: Enhanced IBRS, IBPB: conditional, RSB filling CVE-2020-0543 (Special Register Buffer Data Sampling): No status reported CVE-2019-11135 (TSX Asynchronous Abort): Not affected run-level 3 May 20 21:39 SPEC is set to: /mnt/ramdisk/cpu2017-1.1.7-ic2021.1 Filesystem Type Size Used Avail Use% Mounted on tmpfs tmpfs 125G 11G 115G 9% /mnt/ramdisk From /sys/devices/virtual/dmi/id Vendor: Dell Inc. Product: PowerEdge C6520 Product Family: PowerEdge Serial: SDPT078 Additional information from dmidecode follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. Memory: 16x 00AD063200AD HMAA8GR7AJR4N-XN 64 GB 2 rank 3200, configured at 2666 BIOS: BIOS Vendor: Dell Inc. BIOS Version: 1.1.3 BIOS Date: 04/27/2021 BIOS Revision: 1.1 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================== C | 619.lbm_s(base, peak) 638.imagick_s(base, peak) | 644.nab_s(base) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler Classic for applications running on Intel(R) 64, Version 2021.1 Build 20201112_000000 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C | 644.nab_s(peak) ------------------------------------------------------------------------------ Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64, Version 2021.1 Build 20201113 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C | 619.lbm_s(base, peak) 638.imagick_s(base, peak) | 644.nab_s(base) ------------------------------------------------------------------------------ Intel(R) C Intel(R) 64 Compiler Classic for applications running on Intel(R) 64, Version 2021.1 Build 20201112_000000 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C | 644.nab_s(peak) ------------------------------------------------------------------------------ Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64, Version 2021.1 Build 20201113 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== C++, C, Fortran | 607.cactuBSSN_s(base, peak) ------------------------------------------------------------------------------ Intel(R) C++ Intel(R) 64 Compiler Classic for applications running on Intel(R) 64, Version 2021.1 Build 20201112_000000 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) C Intel(R) 64 Compiler Classic for applications running on Intel(R) 64, Version 2021.1 Build 20201112_000000 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on Intel(R) 64, Version 2021.1 Build 20201112_000000 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran | 603.bwaves_s(base, peak) 649.fotonik3d_s(base, peak) | 654.roms_s(base, peak) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on Intel(R) 64, Version 2021.1 Build 20201112_000000 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ ============================================================================== Fortran, C | 621.wrf_s(base, peak) 627.cam4_s(base, peak) | 628.pop2_s(base, peak) ------------------------------------------------------------------------------ Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on Intel(R) 64, Version 2021.1 Build 20201112_000000 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. Intel(R) C Intel(R) 64 Compiler Classic for applications running on Intel(R) 64, Version 2021.1 Build 20201112_000000 Copyright (C) 1985-2020 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icc Fortran benchmarks: ifort Benchmarks using both Fortran and C: ifort icc Benchmarks using Fortran, C, and C++: icpc icc ifort Base Portability Flags ---------------------- 603.bwaves_s: -DSPEC_LP64 607.cactuBSSN_s: -DSPEC_LP64 619.lbm_s: -DSPEC_LP64 621.wrf_s: -DSPEC_LP64 -DSPEC_CASE_FLAG -convert big_endian 627.cam4_s: -DSPEC_LP64 -DSPEC_CASE_FLAG 628.pop2_s: -DSPEC_LP64 -DSPEC_CASE_FLAG -convert big_endian -assume byterecl 638.imagick_s: -DSPEC_LP64 644.nab_s: -DSPEC_LP64 649.fotonik3d_s: -DSPEC_LP64 654.roms_s: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -m64 -std=c11 -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -qopenmp -DSPEC_OPENMP -mbranches-within-32B-boundaries Fortran benchmarks: -m64 -Wl,-z,muldefs -DSPEC_OPENMP -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -qopenmp -nostandard-realloc-lhs -mbranches-within-32B-boundaries -L/usr/local/jemalloc64-5.0.1/lib -ljemalloc Benchmarks using both Fortran and C: -m64 -std=c11 -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -qopenmp -DSPEC_OPENMP -mbranches-within-32B-boundaries -nostandard-realloc-lhs -L/usr/local/jemalloc64-5.0.1/lib -ljemalloc Benchmarks using Fortran, C, and C++: -m64 -std=c11 -Wl,-z,muldefs -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -qopenmp -DSPEC_OPENMP -mbranches-within-32B-boundaries -nostandard-realloc-lhs -L/usr/local/jemalloc64-5.0.1/lib -ljemalloc Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc 644.nab_s: icx Fortran benchmarks: ifort Benchmarks using both Fortran and C: ifort icc Benchmarks using Fortran, C, and C++: icpc icc ifort Peak Portability Flags ---------------------- Same as Base Portability Flags Peak Optimization Flags ----------------------- C benchmarks: 619.lbm_s: basepeak = yes 638.imagick_s: basepeak = yes 644.nab_s: -m64 -Wl,-z,muldefs -xCORE-AVX512 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -fiopenmp -DSPEC_OPENMP -qopt-mem-layout-trans=4 -fimf-accuracy-bits=14:sqrt -mbranches-within-32B-boundaries -L/usr/local/jemalloc64-5.0.1/lib -ljemalloc Fortran benchmarks: 603.bwaves_s: -m64 -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -DSPEC_SUPPRESS_OPENMP -DSPEC_OPENMP -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -qopenmp -nostandard-realloc-lhs -mbranches-within-32B-boundaries -L/usr/local/jemalloc64-5.0.1/lib -ljemalloc 649.fotonik3d_s: basepeak = yes 654.roms_s: basepeak = yes Benchmarks using both Fortran and C: 621.wrf_s: -m64 -std=c11 -Wl,-z,muldefs -prof-gen(pass 1) -prof-use(pass 2) -ipo -xCORE-AVX512 -O3 -no-prec-div -qopt-prefetch -ffinite-math-only -qopt-mem-layout-trans=4 -DSPEC_SUPPRESS_OPENMP -qopenmp -DSPEC_OPENMP -mbranches-within-32B-boundaries -nostandard-realloc-lhs -L/usr/local/jemalloc64-5.0.1/lib -ljemalloc 627.cam4_s: basepeak = yes 628.pop2_s: basepeak = yes Benchmarks using Fortran, C, and C++: 607.cactuBSSN_s: basepeak = yes The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic2021-official-linux64_revA.html http://www.spec.org/cpu2017/flags/Dell-Platform-Flags-PowerEdge-Intel-ICX-rev1.1.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic2021-official-linux64_revA.xml http://www.spec.org/cpu2017/flags/Dell-Platform-Flags-PowerEdge-Intel-ICX-rev1.1.xml SPEC CPU and SPECspeed are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ---------------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2021 Standard Performance Evaluation Corporation Tested with SPEC CPU(R)2017 v1.1.7 on 2021-05-21 00:27:41-0400. Report generated on 2021-07-08 13:37:24 by CPU2017 text formatter v6255. Originally published on 2021-07-06.