SPEC CPU(R)2017 Integer Rate Result Tyrone Systems Tyrone Camarero SDI100A3U-212 (2.80 GHz,Intel Xeon Silver 4309Y) Test Sponsor: Netweb Pte Ltd CPU2017 License: 006042 Test date: Sep-2022 Test sponsor: Netweb Pte Ltd Hardware availability: Jun-2021 Tested by: Tyrone Systems Software availability: May-2022 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate --------------- ------- --------- --------- ------- --------- --------- 500.perlbench_r 32 648 78.6 S 32 593 86.0 S 500.perlbench_r 32 647 78.7 S 32 592 86.0 S 500.perlbench_r 32 648 78.7 * 32 592 86.0 * 502.gcc_r 32 443 102 * 32 402 113 S 502.gcc_r 32 444 102 S 32 400 113 S 502.gcc_r 32 442 102 S 32 402 113 * 505.mcf_r 32 248 208 S 32 248 208 S 505.mcf_r 32 249 208 S 32 249 208 S 505.mcf_r 32 248 208 * 32 248 208 * 520.omnetpp_r 32 501 83.8 S 32 501 83.8 S 520.omnetpp_r 32 495 84.8 S 32 495 84.8 S 520.omnetpp_r 32 497 84.5 * 32 497 84.5 * 523.xalancbmk_r 32 173 195 S 32 173 195 S 523.xalancbmk_r 32 171 197 * 32 171 197 * 523.xalancbmk_r 32 171 198 S 32 171 198 S 525.x264_r 32 236 237 S 32 222 252 S 525.x264_r 32 236 238 S 32 222 253 S 525.x264_r 32 236 238 * 32 222 253 * 531.deepsjeng_r 32 431 85.0 S 32 431 85.0 S 531.deepsjeng_r 32 430 85.2 * 32 430 85.2 * 531.deepsjeng_r 32 430 85.2 S 32 430 85.2 S 541.leela_r 32 653 81.2 * 32 653 81.2 * 541.leela_r 32 653 81.1 S 32 653 81.1 S 541.leela_r 32 652 81.2 S 32 652 81.2 S 548.exchange2_r 32 345 243 S 32 345 243 S 548.exchange2_r 32 344 244 S 32 344 244 S 548.exchange2_r 32 345 243 * 32 345 243 * 557.xz_r 32 538 64.2 * 32 538 64.2 * 557.xz_r 32 537 64.4 S 32 537 64.4 S 557.xz_r 32 538 64.2 S 32 538 64.2 S ================================================================================= 500.perlbench_r 32 648 78.7 * 32 592 86.0 * 502.gcc_r 32 443 102 * 32 402 113 * 505.mcf_r 32 248 208 * 32 248 208 * 520.omnetpp_r 32 497 84.5 * 32 497 84.5 * 523.xalancbmk_r 32 171 197 * 32 171 197 * 525.x264_r 32 236 238 * 32 222 253 * 531.deepsjeng_r 32 430 85.2 * 32 430 85.2 * 541.leela_r 32 653 81.2 * 32 653 81.2 * 548.exchange2_r 32 345 243 * 32 345 243 * 557.xz_r 32 538 64.2 * 32 538 64.2 * SPECrate(R)2017_int_base 122 SPECrate(R)2017_int_peak 125 HARDWARE -------- CPU Name: Intel Xeon Silver 4309Y Max MHz: 3600 Nominal: 2800 Enabled: 16 cores, 2 chips, 2 threads/core Orderable: 1,2 chips Cache L1: 32 KB I + 48 KB D on chip per core L2: 1.25 MB I+D on chip per core L3: 12 MB I+D on chip per chip Other: None Memory: 1 TB (16 x 64 GB 2Rx4 PC4-3200AA-R, running at 2666) Storage: 1 x 512 GB NVMe SSD Other: None SOFTWARE -------- OS: Red Hat Enterprise Linux release 8.5 (Ootpa) 4.18.0-348.el8.x86_64 Compiler: C/C++: Version 2022.1 of Intel oneAPI DPC++/C++ Compiler for Linux; Fortran: Version 2022.1 of Intel Fortran Compiler for Linux; Parallel: No Firmware: Version 1.2a released May-2022 File System: xfs System State: Run level 3 (multi-user) Base Pointers: 64-bit Peak Pointers: 32/64-bit Other: jemalloc memory allocator V5.0.1 Power Management: BIOS and OS set to prefer performance at the cost of additional power usage. Compiler Notes -------------- SPEC has ruled that the compiler used for this result was performing a compilation that specifically improves the performance of the 523.xalancbmk_r / 623.xalancbmk_s benchmarks using a priori knowledge of the SPEC code and dataset to perform a transformation that has narrow applicability. In order to encourage optimizations that have wide applicability (see rule 1.4 https://www.spec.org/cpu2017/Docs/runrules.html#rule_1.4), SPEC will no longer publish results using this optimization. This result is left in the SPEC results database for historical reference. Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Environment Variables Notes --------------------------- Environment variables set by runcpu before the start of the run: LD_LIBRARY_PATH = "/home/cpu2017/lib/intel64:/home/cpu2017/lib/ia32:/home/cpu2017/je5.0.1-32" MALLOC_CONF = "retain:true" General Notes ------------- Binaries compiled on a system with 2x Intel Xeon Platinum 8280M CPU + 384GB RAM memory using Red Hat Enterprise Linux 8.4 Transparent Huge Pages enabled by default Prior to runcpu invocation Filesystem page cache synced and cleared with: sync; echo 3> /proc/sys/vm/drop_caches runcpu command invoked through numactl i.e.: numactl --interleave=all runcpu Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2) is mitigated in the system as tested and documented. Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1) is mitigated in the system as tested and documented. NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown) is mitigated in the system as tested and documented. jemalloc, a general purpose malloc implementation built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases Platform Notes -------------- BIOS Settings: Power Technology = Custom ENERGY_PERF_BIAS_CFG mode = Maximum Performance SNC (Sub NUMA)= Enable KTI Prefetch= Enable LLC Dead Line Alloc = Disable Hyper-Threading = Enabled Sysinfo program /home/cpu2017/bin/sysinfo Rev: r6622 of 2021-04-07 982a61ec0915b55891ef0e16acafc64d running on icelake2 Mon Sep 5 10:55:36 2022 SUT (System Under Test) info as seen by some common utilities. For more information on this section, see https://www.spec.org/cpu2017/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Silver 4309Y CPU @ 2.80GHz 2 "physical id"s (chips) 32 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 8 siblings : 16 physical 0: cores 0 1 2 3 4 5 6 7 physical 1: cores 0 1 2 3 4 5 6 7 From lscpu from util-linux 2.32.1: Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 32 On-line CPU(s) list: 0-31 Thread(s) per core: 2 Core(s) per socket: 8 Socket(s): 2 NUMA node(s): 2 Vendor ID: GenuineIntel BIOS Vendor ID: Intel(R) Corporation CPU family: 6 Model: 106 Model name: Intel(R) Xeon(R) Silver 4309Y CPU @ 2.80GHz BIOS Model name: Intel(R) Xeon(R) Silver 4309Y CPU @ 2.80GHz Stepping: 6 CPU MHz: 2800.000 BogoMIPS: 5600.00 Virtualization: VT-x L1d cache: 48K L1i cache: 32K L2 cache: 1280K L3 cache: 12288K NUMA node0 CPU(s): 0-7,16-23 NUMA node1 CPU(s): 8-15,24-31 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 invpcid_single intel_ppin ssbd mba ibrs ibpb stibp ibrs_enhanced tpr_shadow vnmi flexpriority ept vpid ept_ad fsgsbase tsc_adjust sgx bmi1 hle avx2 smep bmi2 erms invpcid cqm rdt_a avx512f avx512dq rdseed adx smap avx512ifma clflushopt clwb intel_pt avx512cd sha_ni avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local split_lock_detect wbnoinvd dtherm ida arat pln pts avx512vbmi umip pku ospke avx512_vbmi2 gfni vaes vpclmulqdq avx512_vnni avx512_bitalg tme avx512_vpopcntdq la57 rdpid sgx_lc fsrm md_clear pconfig flush_l1d arch_capabilities /proc/cpuinfo cache data cache size : 12288 KB From numactl --hardware WARNING: a numactl 'node' might or might not correspond to a physical chip. available: 2 nodes (0-1) node 0 cpus: 0 1 2 3 4 5 6 7 16 17 18 19 20 21 22 23 node 0 size: 515681 MB node 0 free: 515104 MB node 1 cpus: 8 9 10 11 12 13 14 15 24 25 26 27 28 29 30 31 node 1 size: 516052 MB node 1 free: 515378 MB node distances: node 0 1 0: 10 20 1: 20 10 From /proc/meminfo MemTotal: 1056495180 kB HugePages_Total: 0 Hugepagesize: 2048 kB /sbin/tuned-adm active Current active profile: throughput-performance From /etc/*release* /etc/*version* os-release: NAME="Red Hat Enterprise Linux" VERSION="8.5 (Ootpa)" ID="rhel" ID_LIKE="fedora" VERSION_ID="8.5" PLATFORM_ID="platform:el8" PRETTY_NAME="Red Hat Enterprise Linux 8.5 (Ootpa)" ANSI_COLOR="0;31" redhat-release: Red Hat Enterprise Linux release 8.5 (Ootpa) system-release: Red Hat Enterprise Linux release 8.5 (Ootpa) system-release-cpe: cpe:/o:redhat:enterprise_linux:8::baseos uname -a: Linux icelake2 4.18.0-348.el8.x86_64 #1 SMP Mon Oct 4 12:17:22 EDT 2021 x86_64 x86_64 x86_64 GNU/Linux Kernel self-reported vulnerability status: CVE-2018-12207 (iTLB Multihit): Not affected CVE-2018-3620 (L1 Terminal Fault): Not affected Microarchitectural Data Sampling: Not affected CVE-2017-5754 (Meltdown): Not affected CVE-2018-3639 (Speculative Store Bypass): Mitigation: Speculative Store Bypass disabled via prctl and seccomp CVE-2017-5753 (Spectre variant 1): Mitigation: usercopy/swapgs barriers and __user pointer sanitization CVE-2017-5715 (Spectre variant 2): Mitigation: Enhanced IBRS, IBPB: conditional, RSB filling CVE-2020-0543 (Special Register Buffer Data Sampling): Not affected CVE-2019-11135 (TSX Asynchronous Abort): Not affected run-level 3 Sep 5 10:54 SPEC is set to: /home/cpu2017 Filesystem Type Size Used Avail Use% Mounted on /dev/mapper/rhel-home xfs 402G 149G 253G 37% /home From /sys/devices/virtual/dmi/id Vendor: Tyrone Systems Product: Tyrone Camarero SDI100A3U-212 Product Family: SMC X12 Additional information from dmidecode 3.2 follows. WARNING: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. Memory: 16x Samsung M393A8G40AB2-CWE 64 GB 2 rank 3200, configured at 2666 BIOS: BIOS Vendor: American Megatrends International, LLC. BIOS Version: 1.2a BIOS Date: 05/12/2022 BIOS Revision: 5.22 (End of data from sysinfo program) Compiler Version Notes ---------------------- ============================================================================================================ C | 502.gcc_r(peak) ------------------------------------------------------------------------------------------------------------ Intel(R) oneAPI DPC++/C++ Compiler for applications running on IA-32, Version 2022.1.0 Build 20220316 Copyright (C) 1985-2022 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------------------------------------ ============================================================================================================ C | 500.perlbench_r(base, peak) 502.gcc_r(base) 505.mcf_r(base, peak) 525.x264_r(base, peak) | 557.xz_r(base, peak) ------------------------------------------------------------------------------------------------------------ Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64, Version 2022.1.0 Build 20220316 Copyright (C) 1985-2022 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------------------------------------ ============================================================================================================ C | 502.gcc_r(peak) ------------------------------------------------------------------------------------------------------------ Intel(R) oneAPI DPC++/C++ Compiler for applications running on IA-32, Version 2022.1.0 Build 20220316 Copyright (C) 1985-2022 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------------------------------------ ============================================================================================================ C | 500.perlbench_r(base, peak) 502.gcc_r(base) 505.mcf_r(base, peak) 525.x264_r(base, peak) | 557.xz_r(base, peak) ------------------------------------------------------------------------------------------------------------ Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64, Version 2022.1.0 Build 20220316 Copyright (C) 1985-2022 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------------------------------------ ============================================================================================================ C++ | 520.omnetpp_r(base, peak) 523.xalancbmk_r(base, peak) 531.deepsjeng_r(base, peak) | 541.leela_r(base, peak) ------------------------------------------------------------------------------------------------------------ Intel(R) oneAPI DPC++/C++ Compiler for applications running on Intel(R) 64, Version 2022.1.0 Build 20220316 Copyright (C) 1985-2022 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------------------------------------ ============================================================================================================ Fortran | 548.exchange2_r(base, peak) ------------------------------------------------------------------------------------------------------------ Intel(R) Fortran Compiler for applications running on Intel(R) 64, Version 2022.1.0 Build 20220316 Copyright (C) 1985-2022 Intel Corporation. All rights reserved. ------------------------------------------------------------------------------------------------------------ Base Compiler Invocation ------------------------ C benchmarks: icx C++ benchmarks: icpx Fortran benchmarks: ifx Base Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -DSPEC_LP64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -DSPEC_LP64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Base Optimization Flags ----------------------- C benchmarks: -w -std=c11 -m64 -Wl,-z,muldefs -xCORE-AVX2 -O3 -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -L/usr/local/intel/compiler/2022.1.0/linux/compiler/lib/intel64_lin -lqkmalloc C++ benchmarks: -w -m64 -Wl,-z,muldefs -xCORE-AVX2 -O3 -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -L/usr/local/intel/compiler/2022.1.0/linux/compiler/lib/intel64_lin -lqkmalloc Fortran benchmarks: -w -m64 -Wl,-z,muldefs -xCORE-AVX2 -O3 -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -nostandard-realloc-lhs -align array32byte -auto -L/usr/local/intel/compiler/2022.1.0/linux/compiler/lib/intel64_lin -lqkmalloc Peak Compiler Invocation ------------------------ C benchmarks: icx C++ benchmarks: icpx Fortran benchmarks: ifx Peak Portability Flags ---------------------- 500.perlbench_r: -DSPEC_LP64 -DSPEC_LINUX_X64 502.gcc_r: -D_FILE_OFFSET_BITS=64 505.mcf_r: -DSPEC_LP64 520.omnetpp_r: -DSPEC_LP64 523.xalancbmk_r: -DSPEC_LP64 -DSPEC_LINUX 525.x264_r: -DSPEC_LP64 531.deepsjeng_r: -DSPEC_LP64 541.leela_r: -DSPEC_LP64 548.exchange2_r: -DSPEC_LP64 557.xz_r: -DSPEC_LP64 Peak Optimization Flags ----------------------- C benchmarks: 500.perlbench_r: -w -std=c11 -m64 -Wl,-z,muldefs -fprofile-generate(pass 1) -fprofile-use=default.profdata(pass 2) -xCORE-AVX2 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -fno-strict-overflow -L/usr/local/intel/compiler/2022.1.0/linux/compiler/lib/intel64_lin -lqkmalloc 502.gcc_r: -m32 -L/usr/local/intel/compiler/2022.1.0/linux/compiler/lib/ia32_lin -std=gnu89 -Wl,-z,muldefs -fprofile-generate(pass 1) -fprofile-use=default.profdata(pass 2) -xCORE-AVX2 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -L/usr/local/jemalloc32-5.0.1/lib -ljemalloc 505.mcf_r: basepeak = yes 525.x264_r: -w -std=c11 -m64 -Wl,-z,muldefs -xCORE-AVX2 -Ofast -ffast-math -flto -mfpmath=sse -funroll-loops -qopt-mem-layout-trans=4 -fno-alias -L/usr/local/intel/compiler/2022.1.0/linux/compiler/lib/intel64_lin -lqkmalloc 557.xz_r: basepeak = yes C++ benchmarks: 520.omnetpp_r: basepeak = yes 523.xalancbmk_r: basepeak = yes 531.deepsjeng_r: basepeak = yes 541.leela_r: basepeak = yes Fortran benchmarks: 548.exchange2_r: basepeak = yes The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2017/flags/Intel-ic2022-official-linux64_revA.html http://www.spec.org/cpu2017/flags/Tyrone-Platform-Settings-V1.2-ICX-revA.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2017/flags/Intel-ic2022-official-linux64_revA.xml http://www.spec.org/cpu2017/flags/Tyrone-Platform-Settings-V1.2-ICX-revA.xml SPEC CPU and SPECrate are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ---------------------------------------------------------------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact info@spec.org. Copyright 2017-2024 Standard Performance Evaluation Corporation Tested with SPEC CPU(R)2017 v1.1.8 on 2022-09-05 01:25:35-0400. Report generated on 2024-01-29 17:07:30 by CPU2017 text formatter v6255. Originally published on 2022-10-11.