SPEC CPU®2017 Floating Point Speed Result

Copyright 2017-2021 Standard Performance Evaluation Corporation

Lenovo Global Technology

ThinkSystem SR650 V2
(2.60 GHz, Intel Xeon Gold 6348)

SPECspeed®2017_fp_base = 20700

SPECspeed®2017_fp_peak = Not Run

CPU2017 License: 9017 Test Date: May-2021
Test Sponsor: Lenovo Global Technology Hardware Availability: Jul-2021
Tested by: Lenovo Global Technology Software Availability: Feb-2021

Benchmark result graphs are available in the PDF report.

Hardware
CPU Name: Intel Xeon Gold 6348
  Max MHz: 3500
  Nominal: 2600
Enabled: 56 cores, 2 chips
Orderable: 1,2 chips
Cache L1: 32 KB I + 48 KB D on chip per core
  L2: 1.25 MB I+D on chip per core
  L3: 42 MB I+D on chip per chip
  Other: None
Memory: 1 TB (32 x 32 GB 2Rx8 PC4-3200AA-R)
Storage: 1 x 960 GB SATA SSD
Other: None
Software
OS: SUSE Linux Enterprise Server 15 SP2 (x86_64)
Kernel 5.3.18-22-default
Compiler: C/C++: Version 2021.1 of Intel oneAPI DPC++/C++
Compiler Build 20201113 for Linux;
Fortran: Version 2021.1 of Intel Fortran Compiler
Classic Build 20201112 for Linux;
C/C++: Version 2021.1 of Intel C/C++ Compiler
Classic Build 20201112 for Linux
Parallel: Yes
Firmware: Lenovo BIOS Version AFE109PT1 1.00
released Apr-2021
File System: xfs
System State: Run level 3 (multi-user)
Base Pointers: 64-bit
Peak Pointers: Not Applicable
Other: jemalloc memory allocator V5.0.1
Power Management: BIOS and OS set to prefer performance
at the cost of additional power usage

Results Table

Benchmark Base Peak
Threads Seconds Ratio Seconds Ratio Seconds Ratio Threads Seconds Ratio Seconds Ratio Seconds Ratio
SPECspeed®2017_fp_base 20700
SPECspeed®2017_fp_peak Not Run
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
603.bwaves_s 56 86.9 6790 87.5 6740 87.6 6740
607.cactuBSSN_s 56 58.9 2830 60.3 2760 60.3 2760
619.lbm_s 56 36.2 1450 36.3 1440 38.2 1370
621.wrf_s 56 83.3 1590 83.0 1590 82.8 1600
627.cam4_s 56 56.2 1580 55.3 1600 55.7 1590
628.pop2_s 56 1460 81.6 1470 80.8 1460 81.3
638.imagick_s 56 58.5 2470 58.7 2460 58.6 2460
644.nab_s 56 41.8 4180 41.8 4180 41.8 4180
649.fotonik3d_s 56 82.3 1110 82.0 1110 83.4 1090
654.roms_s 56 69.2 2280 71.1 2220 68.8 2290

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"

Environment Variables Notes

Environment variables set by runcpu before the start of the run:
KMP_AFFINITY = "granularity=fine,compact"
LD_LIBRARY_PATH =
     "/home/cpu2017-1.1.5-ic2021.1-revA-update1/lib/intel64:/home/cpu2017-1.1
     .5-ic2021.1-revA-update1/je5.0.1-64"
MALLOC_CONF = "retain:true"
OMP_STACKSIZE = "192M"

General Notes

 Binaries compiled on a system with 1x Intel Core i9-7980XE CPU + 64GB RAM
 memory using Redhat Enterprise Linux 8.0
 Transparent Huge Pages enabled by default
 Prior to runcpu invocation
 Filesystem page cache synced and cleared with:
 sync; echo 3>       /proc/sys/vm/drop_caches
NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown)
is mitigated in the system as tested and documented.
Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1)
is mitigated in the system as tested and documented.
Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2)
is mitigated in the system as tested and documented.
 jemalloc, a general purpose malloc implementation
 built with the RedHat Enterprise 7.5, and the system compiler gcc 4.8.5
 sources available from jemalloc.net or https://github.com/jemalloc/jemalloc/releases

Platform Notes

BIOS configuration:
Choose Operating Mode set to Maximum Performance and then set it to Custom Mode
C-States set to Legacy
Adjacent Cache Prefetch set to Disabled
Hyper-Threading set to Disabled
LLC Prefetch set to Enable

 Sysinfo program /home/cpu2017-1.1.5-ic2021.1-revA-update1/bin/sysinfo
 Rev: r6538 of 2020-09-24 e8664e66d2d7080afeaa89d4b38e2f1c
 running on localhost Wed May 19 00:18:40 2021

 SUT (System Under Test) info as seen by some common utilities.
 For more information on this section, see
    https://www.spec.org/cpu2017/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) Gold 6348 CPU @ 2.60GHz
       2  "physical id"s (chips)
       56 "processors"
    cores, siblings (Caution: counting these is hw and system dependent. The following
    excerpts from /proc/cpuinfo might not be reliable.  Use with caution.)
       cpu cores : 28
       siblings  : 28
       physical 0: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
       25 26 27
       physical 1: cores 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
       25 26 27

 From lscpu:
      Architecture:        x86_64
      CPU op-mode(s):      32-bit, 64-bit
      Byte Order:          Little Endian
      Address sizes:       46 bits physical, 57 bits virtual
      CPU(s):              56
      On-line CPU(s) list: 0-55
      Thread(s) per core:  1
      Core(s) per socket:  28
      Socket(s):           2
      NUMA node(s):        2
      Vendor ID:           GenuineIntel
      CPU family:          6
      Model:               106
      Model name:          Intel(R) Xeon(R) Gold 6348 CPU @ 2.60GHz
      Stepping:            6
      CPU MHz:             1669.101
      BogoMIPS:            5200.00
      Virtualization:      VT-x
      L1d cache:           48K
      L1i cache:           32K
      L2 cache:            1280K
      L3 cache:            43008K
      NUMA node0 CPU(s):   0-27
      NUMA node1 CPU(s):   28-55
      Flags:               fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
      pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp
      lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid
      aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 sdbg fma cx16
      xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt tsc_deadline_timer aes xsave
      avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault epb cat_l3 invpcid_single ssbd
      mba ibrs ibpb stibp ibrs_enhanced tpr_shadow vnmi flexpriority ept vpid ept_ad
      fsgsbase tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm rdt_a avx512f
      avx512dq rdseed adx smap avx512ifma clflushopt clwb intel_pt avx512cd sha_ni
      avx512bw avx512vl xsaveopt xsavec xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total
      cqm_mbm_local wbnoinvd dtherm ida arat pln pts avx512vbmi umip pku ospke
      avx512_vbmi2 gfni vaes vpclmulqdq avx512_vnni avx512_bitalg tme avx512_vpopcntdq
      la57 rdpid md_clear pconfig flush_l1d arch_capabilities

 /proc/cpuinfo cache data
    cache size : 43008 KB

 From numactl --hardware  WARNING: a numactl 'node' might or might not correspond to a
 physical chip.
   available: 2 nodes (0-1)
   node 0 cpus: 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27
   node 0 size: 515679 MB
   node 0 free: 514924 MB
   node 1 cpus: 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52
   53 54 55
   node 1 size: 516052 MB
   node 1 free: 515563 MB
   node distances:
   node   0   1
     0:  10  20
     1:  20  10

 From /proc/meminfo
    MemTotal:       1056493676 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 /usr/bin/lsb_release -d
    SUSE Linux Enterprise Server 15 SP2

 From /etc/*release* /etc/*version*
    os-release:
       NAME="SLES"
       VERSION="15-SP2"
       VERSION_ID="15.2"
       PRETTY_NAME="SUSE Linux Enterprise Server 15 SP2"
       ID="sles"
       ID_LIKE="suse"
       ANSI_COLOR="0;32"
       CPE_NAME="cpe:/o:suse:sles:15:sp2"

 uname -a:
    Linux localhost 5.3.18-22-default #1 SMP Wed Jun 3 12:16:43 UTC 2020 (720aeba) x86_64
    x86_64 x86_64 GNU/Linux

 Kernel self-reported vulnerability status:

 CVE-2018-12207 (iTLB Multihit):                        Not affected
 CVE-2018-3620 (L1 Terminal Fault):                     Not affected
 Microarchitectural Data Sampling:                      Not affected
 CVE-2017-5754 (Meltdown):                              Not affected
 CVE-2018-3639 (Speculative Store Bypass):              Mitigation: Speculative Store
                                                        Bypass disabled via prctl and
                                                        seccomp
 CVE-2017-5753 (Spectre variant 1):                     Mitigation: usercopy/swapgs
                                                        barriers and __user pointer
                                                        sanitization
 CVE-2017-5715 (Spectre variant 2):                     Mitigation: Enhanced IBRS, IBPB:
                                                        conditional, RSB filling
 CVE-2020-0543 (Special Register Buffer Data Sampling): Not affected
 CVE-2019-11135 (TSX Asynchronous Abort):               Not affected

 run-level 3 May 19 00:16

 SPEC is set to: /home/cpu2017-1.1.5-ic2021.1-revA-update1
    Filesystem     Type  Size  Used Avail Use% Mounted on
    /dev/sdb3      xfs   891G   23G  868G   3% /

 From /sys/devices/virtual/dmi/id
     Vendor:         Lenovo
     Product:        ThinkSystem SR650 V2 MB
     Product Family: ThinkSystem
     Serial:         1234567890

 Additional information from dmidecode follows.  WARNING: Use caution when you interpret
 this section. The 'dmidecode' program reads system data which is "intended to allow
 hardware to be accurately determined", but the intent may not be met, as there are
 frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard.
   Memory:
     32x Samsung M393A4G43AB3-CWE 32 GB 2 rank 3200

 BIOS:
    BIOS Vendor:       Lenovo
    BIOS Version:      AFE109PT1-1.00
    BIOS Date:         04/28/2021
    BIOS Revision:     1.0
    Firmware Revision: 1.0

 (End of data from sysinfo program)

Compiler Version Notes

==============================================================================
C               | 619.lbm_s(base) 638.imagick_s(base) 644.nab_s(base)
------------------------------------------------------------------------------
Intel(R) C Intel(R) 64 Compiler Classic for applications running on Intel(R)
  64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C, Fortran | 607.cactuBSSN_s(base)
------------------------------------------------------------------------------
Intel(R) C++ Intel(R) 64 Compiler Classic for applications running on
  Intel(R) 64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
Intel(R) C Intel(R) 64 Compiler Classic for applications running on Intel(R)
  64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on
  Intel(R) 64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran         | 603.bwaves_s(base) 649.fotonik3d_s(base) 654.roms_s(base)
------------------------------------------------------------------------------
Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on
  Intel(R) 64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran, C      | 621.wrf_s(base) 627.cam4_s(base) 628.pop2_s(base)
------------------------------------------------------------------------------
Intel(R) Fortran Intel(R) 64 Compiler Classic for applications running on
  Intel(R) 64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
Intel(R) C Intel(R) 64 Compiler Classic for applications running on Intel(R)
  64, Version 2021.1 Build 20201112_000000
Copyright (C) 1985-2020 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

Base Compiler Invocation

C benchmarks:

 icc 

Fortran benchmarks:

 ifort 

Benchmarks using both Fortran and C:

 ifort   icc 

Benchmarks using Fortran, C, and C++:

 icpc   icc   ifort 

Base Portability Flags

603.bwaves_s:  -DSPEC_LP64 
607.cactuBSSN_s:  -DSPEC_LP64 
619.lbm_s:  -DSPEC_LP64 
621.wrf_s:  -DSPEC_LP64   -DSPEC_CASE_FLAG   -convert big_endian 
627.cam4_s:  -DSPEC_LP64   -DSPEC_CASE_FLAG 
628.pop2_s:  -DSPEC_LP64   -DSPEC_CASE_FLAG   -convert big_endian   -assume byterecl 
638.imagick_s:  -DSPEC_LP64 
644.nab_s:  -DSPEC_LP64 
649.fotonik3d_s:  -DSPEC_LP64 
654.roms_s:  -DSPEC_LP64 

Base Optimization Flags

C benchmarks:

 -m64   -std=c11   -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4   -qopenmp   -DSPEC_OPENMP   -mbranches-within-32B-boundaries 

Fortran benchmarks:

 -m64   -Wl,-z,muldefs   -DSPEC_OPENMP   -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4   -qopenmp   -nostandard-realloc-lhs   -mbranches-within-32B-boundaries   -L/usr/local/jemalloc64-5.0.1/lib   -ljemalloc 

Benchmarks using both Fortran and C:

 -m64   -std=c11   -Wl,-z,muldefs   -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4   -qopenmp   -DSPEC_OPENMP   -mbranches-within-32B-boundaries   -nostandard-realloc-lhs   -L/usr/local/jemalloc64-5.0.1/lib   -ljemalloc 

Benchmarks using Fortran, C, and C++:

 -m64   -std=c11   -Wl,-z,muldefs   -xCORE-AVX2   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4   -qopenmp   -DSPEC_OPENMP   -mbranches-within-32B-boundaries   -nostandard-realloc-lhs   -L/usr/local/jemalloc64-5.0.1/lib   -ljemalloc 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2017/flags/Lenovo-Platform-SPECcpu2017-Flags-V1.2-ICElake-D.html,
http://www.spec.org/cpu2017/flags/Intel-ic2021-official-linux64_revA.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2017/flags/Lenovo-Platform-SPECcpu2017-Flags-V1.2-ICElake-D.xml,
http://www.spec.org/cpu2017/flags/Intel-ic2021-official-linux64_revA.xml.