SPEC CPU®2017 Floating Point Rate Result

Copyright 2017-2020 Standard Performance Evaluation Corporation

Cisco Systems

Cisco UCS C240 M5 (Intel Xeon Gold 6246,
3.30GHz)

SPECrate®2017_fp_base = 19000

SPECrate®2017_fp_peak = 19300

CPU2017 License: 9019 Test Date: Aug-2019
Test Sponsor: Cisco Systems Hardware Availability: Apr-2019
Tested by: Cisco Systems Software Availability: May-2019

Benchmark result graphs are available in the PDF report.

Hardware
CPU Name: Intel Xeon Gold 6246
  Max MHz: 4200
  Nominal: 3300
Enabled: 24 cores, 2 chips, 2 threads/core
Orderable: 1,2 Chips
Cache L1: 32 KB I + 32 KB D on chip per core
  L2: 1 MB I+D on chip per core
  L3: 24.75 MB I+D on chip per chip
  Other: None
Memory: 768 GB (24 x 32 GB 2Rx4 PC4-2933V-R)
Storage: 1 x 1.9 TB SSD SAS
Other: None
Software
OS: SUSE Linux Enterprise Server 15 (x86_64)
4.12.14-23-default
Compiler: C/C++: Version 19.0.4.227 of Intel C/C++
Compiler for Linux;
Fortran: Version 19.0.4.227 of Intel Fortran
Compiler for Linux
Parallel: No
Firmware: Version 4.0.3 released Mar-2019
File System: xfs
System State: Run level 3 (multi-user)
Base Pointers: 64-bit
Peak Pointers: 64-bit
Other: None
Power Management: --

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
SPECrate®2017_fp_base 19000
SPECrate®2017_fp_peak 19300
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
503.bwaves_r 48 955 504 954 504 954 504 48 955 504 955 504 955 504
507.cactuBSSN_r 48 460 132 460 132 460 132 48 460 132 461 132 460 132
508.namd_r 48 332 138 330 138 331 138 48 329 138 329 139 329 138
510.parest_r 48 1001 125 1001 125 1001 125 48 1000 126 1001 125 1002 125
511.povray_r 48 553 203 554 202 552 203 48 470 239 473 237 474 236
519.lbm_r 48 479 106 480 105 479 106 48 479 106 480 105 479 106
521.wrf_r 48 517 208 519 207 519 207 48 501 214 499 216 483 222
526.blender_r 48 380 192 381 192 382 192 48 380 192 381 192 380 192
527.cam4_r 48 402 209 403 208 402 209 48 394 213 391 215 394 213
538.imagick_r 48 272 438 273 438 273 438 48 272 438 273 437 273 438
544.nab_r 48 268 302 266 304 265 305 48 264 306 264 306 268 301
549.fotonik3d_r 48 1273 147 1273 147 1273 147 48 1273 147 1271 147 1272 147
554.roms_r 48 729 105 732 104 732 104 48 733 104 733 104 735 104

Submit Notes

 The numactl mechanism was used to bind copies to processors. The config file option 'submit'
 was used to generate numactl commands to bind each copy to a specific processor.
 For details, please see the config file.

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"

General Notes

Environment variables set by runcpu before the start of the run:
LD_LIBRARY_PATH = "/home/cpu2017/lib/intel64"

 Binaries compiled on a system with 1x Intel Core i9-7900X CPU + 32GB RAM
 memory using Redhat Enterprise Linux 7.5
 Transparent Huge Pages enabled by default
 Prior to runcpu invocation
 Filesystem page cache synced and cleared with:
 sync; echo 3>       /proc/sys/vm/drop_caches
 runcpu command invoked through numactl i.e.:
 numactl --interleave=all runcpu <etc>
NA: The test sponsor attests, as of date of publication, that CVE-2017-5754 (Meltdown)
is mitigated in the system as tested and documented.
Yes: The test sponsor attests, as of date of publication, that CVE-2017-5753 (Spectre variant 1)
is mitigated in the system as tested and documented.
Yes: The test sponsor attests, as of date of publication, that CVE-2017-5715 (Spectre variant 2)
is mitigated in the system as tested and documented.

Platform Notes

BIOS Settings:
Intel HyperThreading Technology set to Enabled
SNC set to Enabled
IMC Interleaving set to 1-way Interleave
Patrol Scrub set to Disabled
 Sysinfo program /home/cpu2017/bin/sysinfo
 Rev: r5974 of 2018-05-19 9bcde8f2999c33d61f64985e45859ea9
 running on linux-2vgg Fri Aug 30 20:25:24 2019

 SUT (System Under Test) info as seen by some common utilities.
 For more information on this section, see
    https://www.spec.org/cpu2017/Docs/config.html#sysinfo

 From /proc/cpuinfo
    model name : Intel(R) Xeon(R) Gold 6246 CPU @ 3.30GHz
       2  "physical id"s (chips)
       48 "processors"
    cores, siblings (Caution: counting these is hw and system dependent. The following
    excerpts from /proc/cpuinfo might not be reliable.  Use with caution.)
       cpu cores : 12
       siblings  : 24
       physical 0: cores 2 3 4 10 11 16 17 20 24 25 27
       physical 1: cores 0 2 4 8 9 10 11 17 18 19 25 27

 From lscpu:
      Architecture:        x86_64
      CPU op-mode(s):      32-bit, 64-bit
      Byte Order:          Little Endian
      CPU(s):              48
      On-line CPU(s) list: 0-47
      Thread(s) per core:  2
      Core(s) per socket:  12
      Socket(s):           2
      NUMA node(s):        4
      Vendor ID:           GenuineIntel
      CPU family:          6
      Model:               85
      Model name:          Intel(R) Xeon(R) Gold 6246 CPU @ 3.30GHz
      Stepping:            7
      CPU MHz:             3300.000
      CPU max MHz:         4200.0000
      CPU min MHz:         1200.0000
      BogoMIPS:            6600.00
      Virtualization:      VT-x
      L1d cache:           32K
      L1i cache:           32K
      L2 cache:            1024K
      L3 cache:            25344K
      NUMA node0 CPU(s):   0,1,6,7,9,10,24,25,30,31,33,34
      NUMA node1 CPU(s):   2-5,8,11,26-29,32,35
      NUMA node2 CPU(s):   12,13,15,16,19,22,36,37,39,40,43,46
      NUMA node3 CPU(s):   14,17,18,20,21,23,38,41,42,44,45,47
      Flags:               fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov
      pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx pdpe1gb rdtscp
      lm constant_tsc art arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid
      aperfmperf tsc_known_freq pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3
      sdbg fma cx16 xtpr pdcm pcid dca sse4_1 sse4_2 x2apic movbe popcnt
      tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm abm 3dnowprefetch cpuid_fault
      epb cat_l3 cdp_l3 invpcid_single mba tpr_shadow vnmi flexpriority ept vpid fsgsbase
      tsc_adjust bmi1 hle avx2 smep bmi2 erms invpcid rtm cqm mpx rdt_a avx512f avx512dq
      rdseed adx smap clflushopt clwb intel_pt avx512cd avx512bw avx512vl xsaveopt xsavec
      xgetbv1 xsaves cqm_llc cqm_occup_llc cqm_mbm_total cqm_mbm_local ibpb ibrs stibp
      dtherm ida arat pln pts hwp hwp_act_window hwp_epp hwp_pkg_req pku ospke avx512_vnni
      arch_capabilities ssbd

 /proc/cpuinfo cache data
    cache size : 25344 KB

 From numactl --hardware  WARNING: a numactl 'node' might or might not correspond to a
 physical chip.
   available: 4 nodes (0-3)
   node 0 cpus: 0 1 6 7 9 10 24 25 30 31 33 34
   node 0 size: 192075 MB
   node 0 free: 183030 MB
   node 1 cpus: 2 3 4 5 8 11 26 27 28 29 32 35
   node 1 size: 193528 MB
   node 1 free: 188063 MB
   node 2 cpus: 12 13 15 16 19 22 36 37 39 40 43 46
   node 2 size: 193528 MB
   node 2 free: 188053 MB
   node 3 cpus: 14 17 18 20 21 23 38 41 42 44 45 47
   node 3 size: 193526 MB
   node 3 free: 188028 MB
   node distances:
   node   0   1   2   3
     0:  10  11  21  21
     1:  11  10  21  21
     2:  21  21  10  11
     3:  21  21  11  10

 From /proc/meminfo
    MemTotal:       791202936 kB
    HugePages_Total:       0
    Hugepagesize:       2048 kB

 From /etc/*release* /etc/*version*
    os-release:
       NAME="SLES"
       VERSION="15"
       VERSION_ID="15"
       PRETTY_NAME="SUSE Linux Enterprise Server 15"
       ID="sles"
       ID_LIKE="suse"
       ANSI_COLOR="0;32"
       CPE_NAME="cpe:/o:suse:sles:15"

 uname -a:
    Linux linux-2vgg 4.12.14-23-default #1 SMP Tue May 29 21:04:44 UTC 2018 (cd0437b)
    x86_64 x86_64 x86_64 GNU/Linux

 Kernel self-reported vulnerability status:

 CVE-2017-5754 (Meltdown):          Not affected
 CVE-2017-5753 (Spectre variant 1): Mitigation: __user pointer sanitization
 CVE-2017-5715 (Spectre variant 2): Mitigation: Indirect Branch Restricted Speculation,
 IBPB, IBRS_FW

 run-level 3 Aug 30 13:33

 SPEC is set to: /home/cpu2017
    Filesystem     Type  Size  Used Avail Use% Mounted on
    /dev/sda1      xfs   373G   39G  335G  11% /

 Additional information from dmidecode follows.  WARNING: Use caution when you interpret
 this section. The 'dmidecode' program reads system data which is "intended to allow
 hardware to be accurately determined", but the intent may not be met, as there are
 frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard.
   BIOS Cisco Systems, Inc. C240M5.4.0.3.34.0301190218 03/01/2019
   Memory:
    24x 0xCE00 M393A4K40CB2-CVF 32 GB 2 rank 2933, configured at 2934

 (End of data from sysinfo program)

Compiler Version Notes

==============================================================================
C               | 519.lbm_r(base, peak) 538.imagick_r(base, peak)
                | 544.nab_r(base, peak)
------------------------------------------------------------------------------
Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64,
  Version 19.0.4.227 Build 20190416
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++             | 508.namd_r(base, peak) 510.parest_r(base, peak)
------------------------------------------------------------------------------
Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64,
  Version 19.0.4.227 Build 20190416
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C          | 511.povray_r(base, peak) 526.blender_r(base, peak)
------------------------------------------------------------------------------
Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64,
  Version 19.0.4.227 Build 20190416
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64,
  Version 19.0.4.227 Build 20190416
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
C++, C, Fortran | 507.cactuBSSN_r(base, peak)
------------------------------------------------------------------------------
Intel(R) C++ Intel(R) 64 Compiler for applications running on Intel(R) 64,
  Version 19.0.4.227 Build 20190416
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64,
  Version 19.0.4.227 Build 20190416
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R)
  64, Version 19.0.4.227 Build 20190416
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran         | 503.bwaves_r(base, peak) 549.fotonik3d_r(base, peak)
                | 554.roms_r(base, peak)
------------------------------------------------------------------------------
Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R)
  64, Version 19.0.4.227 Build 20190416
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

==============================================================================
Fortran, C      | 521.wrf_r(base, peak) 527.cam4_r(base, peak)
------------------------------------------------------------------------------
Intel(R) Fortran Intel(R) 64 Compiler for applications running on Intel(R)
  64, Version 19.0.4.227 Build 20190416
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
Intel(R) C Intel(R) 64 Compiler for applications running on Intel(R) 64,
  Version 19.0.4.227 Build 20190416
Copyright (C) 1985-2019 Intel Corporation.  All rights reserved.
------------------------------------------------------------------------------

Base Compiler Invocation

C benchmarks:

 icc -m64 -std=c11 

C++ benchmarks:

 icpc -m64 

Fortran benchmarks:

 ifort -m64 

Benchmarks using both Fortran and C:

 ifort -m64   icc -m64 -std=c11 

Benchmarks using both C and C++:

 icpc -m64   icc -m64 -std=c11 

Benchmarks using Fortran, C, and C++:

 icpc -m64   icc -m64 -std=c11   ifort -m64 

Base Portability Flags

503.bwaves_r:  -DSPEC_LP64 
507.cactuBSSN_r:  -DSPEC_LP64 
508.namd_r:  -DSPEC_LP64 
510.parest_r:  -DSPEC_LP64 
511.povray_r:  -DSPEC_LP64 
519.lbm_r:  -DSPEC_LP64 
521.wrf_r:  -DSPEC_LP64   -DSPEC_CASE_FLAG   -convert big_endian 
526.blender_r:  -DSPEC_LP64   -DSPEC_LINUX   -funsigned-char 
527.cam4_r:  -DSPEC_LP64   -DSPEC_CASE_FLAG 
538.imagick_r:  -DSPEC_LP64 
544.nab_r:  -DSPEC_LP64 
549.fotonik3d_r:  -DSPEC_LP64 
554.roms_r:  -DSPEC_LP64 

Base Optimization Flags

C benchmarks:

 -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4 

C++ benchmarks:

 -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4 

Fortran benchmarks:

 -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4   -auto   -nostandard-realloc-lhs   -align array32byte 

Benchmarks using both Fortran and C:

 -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4   -auto   -nostandard-realloc-lhs   -align array32byte 

Benchmarks using both C and C++:

 -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4 

Benchmarks using Fortran, C, and C++:

 -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4   -auto   -nostandard-realloc-lhs   -align array32byte 

Peak Compiler Invocation

C benchmarks:

 icc -m64 -std=c11 

C++ benchmarks:

 icpc -m64 

Fortran benchmarks:

 ifort -m64 

Benchmarks using both Fortran and C:

 ifort -m64   icc -m64 -std=c11 

Benchmarks using both C and C++:

 icpc -m64   icc -m64 -std=c11 

Benchmarks using Fortran, C, and C++:

 icpc -m64   icc -m64 -std=c11   ifort -m64 

Peak Portability Flags

Same as Base Portability Flags

Peak Optimization Flags

C benchmarks:

519.lbm_r:  -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX512   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4 
538.imagick_r:  -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4 
544.nab_r:  Same as 538.imagick_r 

C++ benchmarks:

508.namd_r:  -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX512   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4 
510.parest_r:  -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4 

Fortran benchmarks:

503.bwaves_r:  -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4   -auto   -nostandard-realloc-lhs   -align array32byte 
549.fotonik3d_r:  Same as 503.bwaves_r 
554.roms_r:  -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX512   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4   -auto   -nostandard-realloc-lhs   -align array32byte 

Benchmarks using both Fortran and C:

 -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX512   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4   -auto   -nostandard-realloc-lhs   -align array32byte 

Benchmarks using both C and C++:

511.povray_r:  -prof-gen(pass 1)   -prof-use(pass 2)   -ipo   -xCORE-AVX512   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4 
526.blender_r:  -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4 

Benchmarks using Fortran, C, and C++:

 -xCORE-AVX512   -ipo   -O3   -no-prec-div   -qopt-prefetch   -ffinite-math-only   -qopt-mem-layout-trans=4   -auto   -nostandard-realloc-lhs   -align array32byte 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2017/flags/Intel-ic19.0u1-official-linux64.2019-07-09.html,
http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revH.2019-07-31.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2017/flags/Intel-ic19.0u1-official-linux64.2019-07-09.xml,
http://www.spec.org/cpu2017/flags/Cisco-Platform-Settings-V1.2-revH.2019-07-31.xml.