SPEC(R) CINT2006 Summary Hewlett Packard Enterprise ProLiant DL380 Gen10 (2.40 GHz, Intel Xeon Gold 6148) Test Sponsor: HPE Tue Oct 17 11:19:40 2017 CPU2006 License: 3 Test date: Oct-2017 Test sponsor: HPE Hardware availability: Oct-2017 Tested by: HPE Software availability: Apr-2017 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 80 544 1440 * 400.perlbench 80 544 1440 S 400.perlbench 80 544 1440 S 401.bzip2 80 887 871 S 401.bzip2 80 888 870 * 401.bzip2 80 894 864 S 403.gcc 80 461 1400 S 403.gcc 80 459 1400 S 403.gcc 80 460 1400 * 429.mcf 80 283 2580 S 429.mcf 80 283 2580 * 429.mcf 80 284 2570 S 445.gobmk 80 722 1160 * 445.gobmk 80 723 1160 S 445.gobmk 80 721 1160 S 456.hmmer 80 286 2610 S 456.hmmer 80 285 2620 S 456.hmmer 80 285 2620 * 458.sjeng 80 778 1240 S 458.sjeng 80 777 1250 S 458.sjeng 80 778 1240 * 462.libquantum 80 52.5 31600 S 462.libquantum 80 52.5 31600 * 462.libquantum 80 52.4 31600 S 464.h264ref 80 847 2090 S 464.h264ref 80 842 2100 * 464.h264ref 80 840 2110 S 471.omnetpp 80 512 976 S 471.omnetpp 80 509 982 S 471.omnetpp 80 511 979 * 473.astar 80 533 1050 * 473.astar 80 533 1050 S 473.astar 80 532 1060 S 483.xalancbmk 80 263 2100 * 483.xalancbmk 80 263 2100 S 483.xalancbmk 80 264 2090 S ============================================================================== 400.perlbench 80 544 1440 * 401.bzip2 80 888 870 * 403.gcc 80 460 1400 * 429.mcf 80 283 2580 * 445.gobmk 80 722 1160 * 456.hmmer 80 285 2620 * 458.sjeng 80 778 1240 * 462.libquantum 80 52.5 31600 * 464.h264ref 80 842 2100 * 471.omnetpp 80 511 979 * 473.astar 80 533 1050 * 483.xalancbmk 80 263 2100 * SPECint(R)_rate_base2006 1920 SPECint_rate2006 Not Run HARDWARE -------- CPU Name: Intel Xeon Gold 6148 CPU Characteristics: Intel Turbo Boost Technology up to 3.70 GHz CPU MHz: 2400 FPU: Integrated CPU(s) enabled: 40 cores, 2 chips, 20 cores/chip, 2 threads/core CPU(s) orderable: 1, 2 chip(s) Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 1 MB I+D on chip per core L3 Cache: 27.5 MB I+D on chip per chip Other Cache: None Memory: 192 GB (24 x 8 GB 2Rx8 PC4-2666V-R) Disk Subsystem: 1 x 960 GB SSD SATA, RAID 0 Other Hardware: None SOFTWARE -------- Operating System: SUSE Linux Enterprise Server 12 (x86_64) SP2 Kernel 4.4.21-69-default Compiler: C/C++: Version 17.0.3.191 of Intel C/C++ Compiler for Linux Auto Parallel: No File System: xfs System State: Run level 3 (multi-user) Base Pointers: 32-bit Peak Pointers: Not Applicable Other Software: Microquill SmartHeap V10.2 Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Transparent Huge Pages enabled by default Filesystem page cache cleared with: shell invocation of 'sync; echo 3 > /proc/sys/vm/drop_caches' prior to run irqbalance disabled with "systemctl stop irqbalance" tuned profile set wtih "tuned-adm profile throughput-performance" Platform Notes -------------- BIOS Configuration: Thermal Configuration set to Maximum Cooling Memory Patrol Scrubbing set to Disabled LLC Prefetcher set to Enabled LLC Dead Line Allocation set to Disabled Stale A to S set to Disabled Workload Pofile set to General Peak Frequency Compute Energy/Performance Bias set to Maximum Performance Uncore Frequency Scaling set to Auto Workload Pofile set to Custom NUMA Group Size Optimization set to Flat Sysinfo program /home/cpu2006/config/sysinfo.rev6993 Revision 6993 of 2015-11-06 (b5e8d4b4eb51ed28d7f98696cbe290c1) running on dl380gen10 Tue Oct 17 11:19:41 2017 This section contains SUT (System Under Test) info as seen by some common utilities. To remove or add to this section, see: http://www.spec.org/cpu2006/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) Gold 6148 CPU @ 2.40GHz 2 "physical id"s (chips) 80 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 20 siblings : 40 physical 0: cores 0 1 2 3 8 9 10 11 12 16 17 18 19 20 24 25 26 27 28 physical 1: cores 0 1 2 3 8 9 10 11 12 16 17 18 19 20 24 25 26 27 28 cache size : 28160 KB From /proc/meminfo MemTotal: 197547316 kB HugePages_Total: 0 Hugepagesize: 2048 kB /usr/bin/lsb_release -d SUSE Linux Enterprise Server 12 SP2 From /etc/*release* /etc/*version* SuSE-release: SUSE Linux Enterprise Server 12 (x86_64) VERSION = 12 PATCHLEVEL = 2 # This file is deprecated and will be removed in a future service pack or release. # Please check /etc/os-release for details about this release. os-release: NAME="SLES" VERSION="12-SP2" VERSION_ID="12.2" PRETTY_NAME="SUSE Linux Enterprise Server 12 SP2" ID="sles" ANSI_COLOR="0;32" CPE_NAME="cpe:/o:suse:sles:12:sp2" uname -a: Linux dl380gen10 4.4.21-69-default #1 SMP Tue Oct 25 10:58:20 UTC 2016 (9464f67) x86_64 x86_64 x86_64 GNU/Linux run-level 3 Oct 17 11:16 SPEC is set to: /home/cpu2006 Filesystem Type Size Used Avail Use% Mounted on /dev/sdb4 xfs 852G 167G 686G 20% /home Additional information from dmidecode: Warning: Use caution when you interpret this section. The 'dmidecode' program reads system data which is "intended to allow hardware to be accurately determined", but the intent may not be met, as there are frequent changes to hardware, firmware, and the "DMTF SMBIOS" standard. BIOS HPE U30 09/29/2017 Memory: 24x UNKNOWN NOT AVAILABLE 8 GB 2 rank 2666 MHz (End of data from sysinfo program) General Notes ------------- Environment variables set by runspec before the start of the run: LD_LIBRARY_PATH = "/home/cpu2006/lib/ia32:/home/cpu2006/lib/intel64:/home/cpu2006/sh10.2" Binaries compiled on a system with 1x Intel Core i7-4790 CPU + 32GB RAM memory using Redhat Enterprise Linux 7.2 Base Compiler Invocation ------------------------ C benchmarks: icc -m32 -L/opt/intel/compilers_and_libraries_2017/linux/lib/ia32 C++ benchmarks: icpc -m32 -L/opt/intel/compilers_and_libraries_2017/linux/lib/ia32 Base Portability Flags ---------------------- 400.perlbench: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX_IA32 401.bzip2: -D_FILE_OFFSET_BITS=64 403.gcc: -D_FILE_OFFSET_BITS=64 429.mcf: -D_FILE_OFFSET_BITS=64 445.gobmk: -D_FILE_OFFSET_BITS=64 456.hmmer: -D_FILE_OFFSET_BITS=64 458.sjeng: -D_FILE_OFFSET_BITS=64 462.libquantum: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX 464.h264ref: -D_FILE_OFFSET_BITS=64 471.omnetpp: -D_FILE_OFFSET_BITS=64 473.astar: -D_FILE_OFFSET_BITS=64 483.xalancbmk: -D_FILE_OFFSET_BITS=64 -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -qopt-mem-layout-trans=3 C++ benchmarks: -xCORE-AVX512 -ipo -O3 -no-prec-div -qopt-prefetch -qopt-mem-layout-trans=3 -Wl,-z,muldefs -L/sh10.2 -lsmartheap Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.html http://www.spec.org/cpu2006/flags/HPE-Platform-Flags-Intel-V1.2-SKX-revD.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2006/flags/Intel-ic17.0-official-linux64-revF.xml http://www.spec.org/cpu2006/flags/HPE-Platform-Flags-Intel-V1.2-SKX-revD.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2017 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.2. Report generated on Wed Nov 15 10:59:12 2017 by CPU2006 ASCII formatter v6932. Originally published on 14 November 2017.