SPEC(R) CINT2006 Summary Cisco Systems Cisco UCS B200 M3 (Intel Xeon E5-2643, 3.30 GHz) Mon May 7 04:55:12 2012 CPU2006 License: 9019 Test date: May-2012 Test sponsor: Cisco Systems Hardware availability: Jun-2012 Tested by: Cisco Systems Software availability: Dec-2011 Base Base Base Peak Peak Peak Benchmarks Copies Run Time Rate Copies Run Time Rate -------------- ------ --------- --------- ------ --------- --------- 400.perlbench 16 591 265 * 16 503 311 S 400.perlbench 16 592 264 S 16 504 310 * 400.perlbench 16 590 265 S 16 504 310 S 401.bzip2 16 801 193 S 16 782 197 S 401.bzip2 16 801 193 * 16 784 197 * 401.bzip2 16 803 192 S 16 802 192 S 403.gcc 16 437 295 S 16 441 292 S 403.gcc 16 438 294 S 16 442 291 S 403.gcc 16 437 295 * 16 442 292 * 429.mcf 16 254 574 S 16 254 574 S 429.mcf 16 255 573 * 16 255 573 * 429.mcf 16 255 572 S 16 255 572 S 445.gobmk 16 630 267 * 16 599 280 S 445.gobmk 16 632 266 S 16 617 272 S 445.gobmk 16 623 269 S 16 608 276 * 456.hmmer 16 333 449 S 16 273 547 * 456.hmmer 16 332 449 * 16 273 547 S 456.hmmer 16 332 450 S 16 273 546 S 458.sjeng 16 737 263 S 16 683 283 * 458.sjeng 16 718 270 S 16 707 274 S 458.sjeng 16 719 269 * 16 683 283 S 462.libquantum 16 153 2160 * 16 153 2160 * 462.libquantum 16 153 2160 S 16 153 2160 S 462.libquantum 16 153 2160 S 16 153 2160 S 464.h264ref 16 776 456 * 16 763 464 S 464.h264ref 16 774 458 S 16 773 458 * 464.h264ref 16 780 454 S 16 775 457 S 471.omnetpp 16 483 207 S 16 451 222 S 471.omnetpp 16 485 206 S 16 450 222 * 471.omnetpp 16 484 207 * 16 450 222 S 473.astar 16 507 222 * 16 507 222 * 473.astar 16 503 223 S 16 503 223 S 473.astar 16 508 221 S 16 508 221 S 483.xalancbmk 16 270 409 * 16 270 409 * 483.xalancbmk 16 268 412 S 16 268 412 S 483.xalancbmk 16 271 407 S 16 271 407 S ============================================================================== 400.perlbench 16 591 265 * 16 504 310 * 401.bzip2 16 801 193 * 16 784 197 * 403.gcc 16 437 295 * 16 442 292 * 429.mcf 16 255 573 * 16 255 573 * 445.gobmk 16 630 267 * 16 608 276 * 456.hmmer 16 332 449 * 16 273 547 * 458.sjeng 16 719 269 * 16 683 283 * 462.libquantum 16 153 2160 * 16 153 2160 * 464.h264ref 16 776 456 * 16 773 458 * 471.omnetpp 16 484 207 * 16 450 222 * 473.astar 16 507 222 * 16 507 222 * 483.xalancbmk 16 270 409 * 16 270 409 * SPECint(R)_rate_base2006 362 SPECint_rate2006 379 HARDWARE -------- CPU Name: Intel Xeon E5-2643 CPU Characteristics: Intel Turbo Boost Technology up to 3.50 GHz CPU MHz: 3300 FPU: Integrated CPU(s) enabled: 8 cores, 2 chips, 4 cores/chip, 2 threads/core CPU(s) orderable: 1,2 chip Primary Cache: 32 KB I + 32 KB D on chip per core Secondary Cache: 256 KB I+D on chip per core L3 Cache: 10 MB I+D on chip per chip Other Cache: None Memory: 128 GB (16 x 8 GB 2Rx4 PC3-12800R-11, ECC) Disk Subsystem: 1 X 300 GB 10000 RPM SAS Other Hardware: None SOFTWARE -------- Operating System: Red Hat Enterprise Linux Server release 6.2 (Santiago) 2.6.32-220.el6.x86_64 Compiler: C/C++: Version 12.1.3.293 of Intel C++ Studio XE for Linux Auto Parallel: No File System: ext4 System State: Run level 3 (multi-user) Base Pointers: 32-bit Peak Pointers: 32/64-bit Other Software: Microquill SmartHeap V9.01 Submit Notes ------------ The numactl mechanism was used to bind copies to processors. The config file option 'submit' was used to generate numactl commands to bind each copy to a specific processor. For details, please see the config file. Operating System Notes ---------------------- Stack size set to unlimited using "ulimit -s unlimited" Platform Notes -------------- BIOS Configuration: Processor C6 Report set to Disabled Processor C1E set to Disabled CPU Performance set to HPC LV DDR Mode set to Performance-mode Sysinfo program /opt/cpu2006-1.2/config/sysinfo.rev6800 $Rev: 6800 $ $Date:: 2011-10-11 #$ 6f2ebdff5032aaa42e583f96b07f99d3 running on localhost.localdomain Mon May 7 14:25:13 2012 This section contains SUT (System Under Test) info as seen by some common utilities. To remove or add to this section, see: http://www.spec.org/cpu2006/Docs/config.html#sysinfo From /proc/cpuinfo model name : Intel(R) Xeon(R) CPU E5-2643 0 @ 3.30GHz 2 "physical id"s (chips) 16 "processors" cores, siblings (Caution: counting these is hw and system dependent. The following excerpts from /proc/cpuinfo might not be reliable. Use with caution.) cpu cores : 4 siblings : 8 physical 0: cores 0 1 2 3 physical 1: cores 0 1 2 3 cache size : 10240 KB From /proc/meminfo MemTotal: 132101936 kB HugePages_Total: 0 Hugepagesize: 2048 kB /usr/bin/lsb_release -d Red Hat Enterprise Linux Server release 6.2 (Santiago) From /etc/*release* /etc/*version* redhat-release: Red Hat Enterprise Linux Server release 6.2 (Santiago) system-release: Red Hat Enterprise Linux Server release 6.2 (Santiago) system-release-cpe: cpe:/o:redhat:enterprise_linux:6server:ga:server uname -a: Linux localhost.localdomain 2.6.32-220.el6.x86_64 #1 SMP Wed Nov 9 08:03:13 EST 2011 x86_64 x86_64 x86_64 GNU/Linux run-level 3 May 7 14:23 SPEC is set to: /opt/cpu2006-1.2 Filesystem Type Size Used Avail Use% Mounted on /dev/sda1 ext4 275G 8.0G 253G 4% / Additional information from dmidecode: Memory: 16x 0xCE00 M393B1K70DH0-YK0 8 GB 1600 MHz 1 rank (End of data from sysinfo program) General Notes ------------- Environment variables set by runspec before the start of the run: LD_LIBRARY_PATH = "/opt/cpu2006-1.2/libs/32:/opt/cpu2006-1.2/libs/64" Intel HT Technology = Enable Binaries compiled on a system with 2 X Intel Xeon E5-2690 CPU + 128 GB memory using RHEL 6.2 Transparent Huge Pages enabled with: echo always > /sys/kernel/mm/redhat_transparent_hugepage/enabled Filesystem page cache cleared with: echo 1> /proc/sys/vm/drop_caches Base Compiler Invocation ------------------------ C benchmarks: icc -m32 C++ benchmarks: icpc -m32 Base Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LINUX_IA32 462.libquantum: -DSPEC_CPU_LINUX 483.xalancbmk: -DSPEC_CPU_LINUX Base Optimization Flags ----------------------- C benchmarks: -xSSE4.2 -ipo -O3 -no-prec-div -opt-prefetch -opt-mem-layout-trans=3 C++ benchmarks: -xSSE4.2 -ipo -O3 -no-prec-div -opt-prefetch -opt-mem-layout-trans=3 -Wl,-z,muldefs -L/smartheap -lsmartheap Base Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca Peak Compiler Invocation ------------------------ C benchmarks (except as noted below): icc -m32 400.perlbench: icc -m64 401.bzip2: icc -m64 456.hmmer: icc -m64 458.sjeng: icc -m64 C++ benchmarks: icpc -m32 Peak Portability Flags ---------------------- 400.perlbench: -DSPEC_CPU_LP64 -DSPEC_CPU_LINUX_X64 401.bzip2: -DSPEC_CPU_LP64 456.hmmer: -DSPEC_CPU_LP64 458.sjeng: -DSPEC_CPU_LP64 462.libquantum: -DSPEC_CPU_LINUX 483.xalancbmk: -DSPEC_CPU_LINUX Peak Optimization Flags ----------------------- C benchmarks: 400.perlbench: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -auto-ilp32 401.bzip2: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -opt-prefetch -auto-ilp32 -ansi-alias 403.gcc: -xSSE4.2 -ipo -O3 -no-prec-div 429.mcf: basepeak = yes 445.gobmk: -xSSE4.2(pass 2) -prof-gen(pass 1) -prof-use(pass 2) -ansi-alias -opt-mem-layout-trans=3 456.hmmer: -xSSE4.2 -ipo -O3 -no-prec-div -unroll2 -auto-ilp32 458.sjeng: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -unroll4 -auto-ilp32 462.libquantum: basepeak = yes 464.h264ref: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -unroll2 -ansi-alias C++ benchmarks: 471.omnetpp: -xSSE4.2(pass 2) -prof-gen(pass 1) -ipo(pass 2) -O3(pass 2) -no-prec-div(pass 2) -prof-use(pass 2) -ansi-alias -opt-ra-region-strategy=block -Wl,-z,muldefs -L/smartheap -lsmartheap 473.astar: basepeak = yes 483.xalancbmk: basepeak = yes Peak Other Flags ---------------- C benchmarks: 403.gcc: -Dalloca=_alloca The flags files that were used to format this result can be browsed at http://www.spec.org/cpu2006/flags/Intel-ic12.1-official-linux64.20111122.html http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2.20130607.html You can also download the XML flags sources by saving the following links: http://www.spec.org/cpu2006/flags/Intel-ic12.1-official-linux64.20111122.xml http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings-V1.2.20130607.xml SPEC and SPECint are registered trademarks of the Standard Performance Evaluation Corporation. All other brand and product names appearing in this result are trademarks or registered trademarks of their respective holders. ----------------------------------------------------------------------------- For questions about this result, please contact the tester. For other inquiries, please contact webmaster@spec.org. Copyright 2006-2014 Standard Performance Evaluation Corporation Tested with SPEC CPU2006 v1.2. Report generated on Thu Jul 24 08:52:05 2014 by CPU2006 ASCII formatter v6932. Originally published on 22 May 2012.