SPEC® CINT2006 Result

Copyright 2006-2014 Standard Performance Evaluation Corporation

Cisco Systems

Cisco UCS C460 M2 (Intel Xeon E7-4860, 2.26 GHz)

CPU2006 license: 9019 Test date: Sep-2011
Test sponsor: Cisco Systems Hardware Availability: Jul-2011
Tested by: Cisco Systems Software Availability: Aug-2011
Benchmark results graph
Hardware
CPU Name: Intel Xeon E7-4860
CPU Characteristics: Intel Turbo Boost Technology up to 2.66 GHz
CPU MHz: 2266
FPU: Integrated
CPU(s) enabled: 40 cores, 4 chips, 10 cores/chip, 2 threads/core
CPU(s) orderable: 1,2,3,4 chips
Primary Cache: 32 KB I + 32 KB D on chip per core
Secondary Cache: 256 KB I+D on chip per core
L3 Cache: 24 MB I+D on chip per chip
Other Cache: None
Memory: 1 TB (64 x 16 GB 4Rx4 PC3-10600R-9, ECC, running
at 1067 MHz)
Disk Subsystem: 146 GB SAS, 10K RPM
Other Hardware: None
Software
Operating System: Red Hat Enterprise Linux Server release 6.1 beta
Kernel 2.6.32-130.el6.x86_64
Compiler: C/C++: Version 12.0.1.116 of
Intel Compiler XE
Build 20101116
Auto Parallel: No
File System: ext4
System State: Run level 3 (multi-user)
Base Pointers: 32-bit
Peak Pointers: 32/64-bit
Other Software: Microquill SmartHeap V9.01

Results Table

Benchmark Base Peak
Copies Seconds Ratio Seconds Ratio Seconds Ratio Copies Seconds Ratio Seconds Ratio Seconds Ratio
Results appear in the order in which they were run. Bold underlined text indicates a median measurement.
400.perlbench 80 979 799 978 799 981 797 80 828 944 833 938 825 948
401.bzip2 80 1361 567 1360 568 1363 566 80 1308 590 1304 592 1305 591
403.gcc 80 817 789 820 785 819 786 80 822 784 822 783 824 782
429.mcf 80 510 1430 510 1430 510 1430 80 510 1430 510 1430 510 1430
445.gobmk 80 937 896 938 895 935 898 80 894 939 894 939 895 938
456.hmmer 80 584 1280 586 1270 586 1270 80 460 1620 461 1620 460 1620
458.sjeng 80 1123 862 1124 861 1124 861 80 1041 930 1042 929 1041 929
462.libquantum 80 261 6340 261 6350 261 6340 80 261 6340 261 6350 261 6340
464.h264ref 80 1454 1220 1441 1230 1450 1220 80 1452 1220 1454 1220 1455 1220
471.omnetpp 80 866 578 867 577 870 575 80 810 618 810 617 812 616
473.astar 80 940 597 945 594 938 598 80 940 597 945 594 938 598
483.xalancbmk 80 520 1060 520 1060 519 1060 80 520 1060 520 1060 519 1060

Submit Notes

The config file option 'submit' was used.
 numactl was used to bind copies to the cores

Operating System Notes

 Stack size set to unlimited using "ulimit -s unlimited"

General Notes

Environment variables set by runspec before the start of the run:
LD_LIBRARY_PATH = "/opt/cpu2006/smartheap:/opt/cpu2006/ic12.1-libs/ia32/:/opt/cpu2006/ic12.1-libs/intel64"

 Binaries compiled on a system with 1x Core i7-860 CPU + 8GB
 memory using RHEL5.5 with binutils-2.17.50.0.6-14.el5
 Stack size set to unlimited using "ulimit -s unlimited"
 Transparent Huge Pages enabled with:
 echo always > /sys/kernel/mm/redhat_transparent_hugepage/enabled
 Filesystem page cache cleared with:
 echo 1>       /proc/sys/vm/drop_caches
 runspec command invoked through numactl i.e.:
 numactl --interleave=all runspec <etc>

Base Compiler Invocation

C benchmarks:

 icc -m32 

C++ benchmarks:

 icpc -m32 

Base Portability Flags

400.perlbench:  -DSPEC_CPU_LINUX_IA32 
462.libquantum:  -DSPEC_CPU_LINUX 
483.xalancbmk:  -DSPEC_CPU_LINUX 

Base Optimization Flags

C benchmarks:

 -xSSE4.2   -ipo   -O3   -no-prec-div   -opt-prefetch   -opt-mem-layout-trans=3 

C++ benchmarks:

 -xSSE4.2   -ipo   -O3   -no-prec-div   -opt-prefetch   -opt-mem-layout-trans=3   -Wl,-z,muldefs   -L/smartheap -lsmartheap 

Base Other Flags

C benchmarks:

403.gcc:  -Dalloca=_alloca 

Peak Compiler Invocation

C benchmarks (except as noted below):

 icc -m32 
400.perlbench:  icc -m64 
401.bzip2:  icc -m64 
456.hmmer:  icc -m64 
458.sjeng:  icc -m64 

C++ benchmarks:

 icpc -m32 

Peak Portability Flags

400.perlbench:  -DSPEC_CPU_LP64   -DSPEC_CPU_LINUX_X64 
401.bzip2:  -DSPEC_CPU_LP64 
456.hmmer:  -DSPEC_CPU_LP64 
458.sjeng:  -DSPEC_CPU_LP64 
462.libquantum:  -DSPEC_CPU_LINUX 
483.xalancbmk:  -DSPEC_CPU_LINUX 

Peak Optimization Flags

C benchmarks:

400.perlbench:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -auto-ilp32 
401.bzip2:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -opt-prefetch   -auto-ilp32   -ansi-alias 
403.gcc:  -xSSE4.2   -ipo   -O3   -no-prec-div 
429.mcf:  basepeak = yes 
445.gobmk:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -prof-use(pass 2)   -ansi-alias   -opt-mem-layout-trans=3 
456.hmmer:  -xSSE4.2   -ipo   -O3   -no-prec-div   -unroll2   -auto-ilp32 
458.sjeng:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -unroll4   -auto-ilp32 
462.libquantum:  basepeak = yes 
464.h264ref:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -unroll2   -ansi-alias 

C++ benchmarks:

471.omnetpp:  -xSSE4.2(pass 2)   -prof-gen(pass 1)   -ipo(pass 2)   -O3(pass 2)   -no-prec-div(pass 2)   -prof-use(pass 2)   -ansi-alias   -opt-ra-region-strategy=block   -Wl,-z,muldefs   -L/smartheap -lsmartheap 
473.astar:  basepeak = yes 
483.xalancbmk:  basepeak = yes 

Peak Other Flags

C benchmarks:

403.gcc:  -Dalloca=_alloca 

The flags files that were used to format this result can be browsed at
http://www.spec.org/cpu2006/flags/Intel-ic12.1-linux64.html,
http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings.20111118.html.

You can also download the XML flags sources by saving the following links:
http://www.spec.org/cpu2006/flags/Intel-ic12.1-linux64.xml,
http://www.spec.org/cpu2006/flags/Cisco-Platform-Settings.20111118.xml.