# Invocation command line:
# /home/bsc/cpu2006/bin/runspec --config=BladeSymphony_int -T all --reportable int
# output_root was not used for this run
############################################################################
############################################################################
# SPEC CPU2006 Intel Linux64 config file
# HITACHI BladeSymphony
# Intel Composer XE for Linux64

action      = validate
tune        = base
ext         = cpu2006.linux64.ic120.exe
PATHSEP     = /
check_md5   = 1
reportable  = 1
mean_anyway = 1

##### Compiler section
default=default=default=default:
CC  = icc -m64
CXX = icpc -m64
FC  = ifort -m64
OBJ = .o
SMARTHEAP_DIR = /home/bsc/smartheap/lib

##### SSE4.2
SSE          = -xSSE4.2
FAST         =  $(SSE) -ipo -O3 -no-prec-div -static
FASTNOSTATIC =  $(SSE) -ipo -O3 -no-prec-div
LDOPT= -B /usr/share/libhugetlbfs/ -Wl,-melf_x86_64 -Wl,-hugetlbfs-link=BDT

##### Portability & libraries

default:
PORTABILITY = -DSPEC_CPU_LP64

400.perlbench=default:
CPORTABILITY  = -DSPEC_CPU_LINUX_X64

403.gcc=default:
EXTRA_CFLAGS=      -Dalloca=_alloca

462.libquantum=default:
CPORTABILITY=      -DSPEC_CPU_LINUX

483.xalancbmk=default:
CXXPORTABILITY=    -DSPEC_CPU_LINUX

##### Tuning Flags
default=base=default=default:
sw_base_ptrsize = 32/64-bit
sw_peak_ptrsize = 32/64-bit

471.omnetpp,473.astar,483.xalancbmk=default:
EXTRA_LIBS=  -L$(SMARTHEAP_DIR) -lsmartheap64
EXTRA_LDFLAGS= -Wl,-z,muldefs

int=base=default=default:
COPTIMIZE= $(FASTNOSTATIC) -parallel -opt-prefetch -auto-p32
CXXOPTIMIZE= $(FASTNOSTATIC) -opt-prefetch

int=peak=default=default:
COPTIMIZE= -auto-ilp32 -ansi-alias
CXXOPTIMIZE= -ansi-alias
PASS1_CFLAGS     = -prof-gen
PASS2_CFLAGS     = $(FASTNOSTATIC) -prof-use
PASS1_CXXFLAGS   = -prof-gen
PASS2_CXXFLAGS   = $(FASTNOSTATIC) -prof-use
PASS1_LDCFLAGS   = -prof-gen
PASS2_LDCFLAGS   = $(FASTNOSTATIC) -prof-use
PASS1_LDCXXFLAGS = -prof-gen
PASS2_LDCXXFLAGS = $(FASTNOSTATIC) -prof-use

400.perlbench=peak=default:
CC= icc -m32
PORTABILITY=
CPORTABILITY  = -DSPEC_CPU_LINUX_IA32
COPTIMIZE= -ansi-alias -opt-prefetch
PASS1_LDOPT= -B /usr/share/libhugetlbfs/ -Wl,-hugetlbfs-link=BDT
PASS2_LDOPT= -B /usr/share/libhugetlbfs/ -Wl,-hugetlbfs-link=BDT

401.bzip2=peak=default:
COPTIMIZE= -auto-ilp32 -opt-prefetch -ansi-alias -no-prec-div

403.gcc=peak=default:
basepeak=yes

429.mcf=peak=default:
CC= icc -m32
PORTABILITY=
PASS1_LDOPT= -B /usr/share/libhugetlbfs/ -Wl,-hugetlbfs-link=BDT
PASS2_LDOPT= -B /usr/share/libhugetlbfs/ -Wl,-hugetlbfs-link=BDT

445.gobmk=peak=default:
CC= icc -m32
PORTABILITY=
PASS1_CFLAGS     = -prof-gen
PASS2_CFLAGS     = $(SSE) -prof-use
PASS1_LDCFLAGS   = -prof-gen
PASS2_LDCFLAGS   = $(SSE) -prof-use
PASS1_LDOPT= -B /usr/share/libhugetlbfs/ -Wl,-hugetlbfs-link=BDT
PASS2_LDOPT= -B /usr/share/libhugetlbfs/ -Wl,-hugetlbfs-link=BDT

456.hmmer=peak=default:
COPTIMIZE= $(FASTNOSTATIC) -unroll2 -ansi-alias -auto-ilp32
feedback=0

458.sjeng=peak=default:
COPTIMIZE= -unroll4

462.libquantum=peak=default:
basepeak=yes

464.h264ref=peak=default:
CC= icc -m32
PORTABILITY=
COPTIMIZE= -unroll2 -ansi-alias
PASS1_LDOPT= -B /usr/share/libhugetlbfs/ -Wl,-hugetlbfs-link=BDT
PASS2_LDOPT= -B /usr/share/libhugetlbfs/ -Wl,-hugetlbfs-link=BDT

471.omnetpp=peak=default:
CXX= icpc -m32
EXTRA_LIBS=  -L$(SMARTHEAP_DIR) -lsmartheap
PORTABILITY=
CXXOPTIMIZE= -ansi-alias -opt-ra-region-strategy=block
PASS1_LDOPT= -Wl,-z,muldefs -B /usr/share/libhugetlbfs/ -Wl,-hugetlbfs-link=BDT
PASS2_LDOPT= -Wl,-z,muldefs -B /usr/share/libhugetlbfs/ -Wl,-hugetlbfs-link=BDT

473.astar=peak=default:
basepeak=yes

483.xalancbmk=peak=default:
basepeak=yes

#################################################################
default=default=default=default:
license_num      = 35
test_sponsor     = HITACHI
hw_avail         = Feb-2011
sw_avail         = Jan-2011
tester           = HITACHI
hw_cpu_name      = Intel Xeon E5649
hw_cpu_char      = Intel Turbo Boost Technology up to 2.93 GHz
hw_cpu_mhz       = 2533
hw_disk          = 2 x 147 GB 10000 rpm SAS RAID1 configuration
hw_fpu           = Integrated
hw_memory        = 48 GB (6 x 8 GB 2Rx4 PC3-10600R-9, ECC)
hw_model         = BladeSymphony BS2000 (Intel Xeon E5649)
hw_ncpuorder     = 1, 2 chips
hw_ncores        = 12
hw_nchips        = 2
hw_ncoresperchip = 6
hw_nthreadspercore = 1
hw_other         = None
hw_pcache        = 32 KB I + 32 KB D on chip per core
hw_scache        = 256 KB I+D on chip per core
hw_tcache        = 12 MB I+D on chip per chip
hw_ocache        = None
hw_vendor        = HITACHI
prepared_by      = HITACHI
sw_file          = ext3
sw_os000         = Red Hat Enterprise Linux
sw_os001         = Server release 5.4.3, Advanced Platform,
sw_os002         = Kernel 2.6.18-164.9.1.el5 on an x86_64
sw_state         = Run level 3 (multi-user)
sw_other         = Microquill SmartHeap V8.1

int=default=default=default:
sw_compiler000   = Intel C++ Compiler XE for Linux
sw_compiler001   = Version 12.0.2.137 Build 20110112

notes_plat_000= BIOS Settings:
notes_plat_005= Intel HT Technology = Disabled
notes_plat_010= Data Reuse Optimization = Disabled

notes_os_000= 'ulimit -s unlimited' was used to set the stacksize to unlimited prior to run
notes_os_005= Hugepages was enabled with the following:
notes_os_010= 'nodev   /mnt/hugepages   hugetlbfs  defaults   0 0' added to /etc/fstab
notes_os_015= echo 900 > /proc/sys/vm/nr_hugepages
notes_os_020= export HUGETLB_MORECORE=yes
notes_os_025= export LD_PRELOAD=/usr/lib64/libhugetlbfs.so





# The following section was added automatically, and contains settings that
# did not appear in the original configuration file, but were added to the
# raw file after the run.
default:
flagsurl000 = http://www.spec.org/cpu2006/flags/Intel-ic12.0-linux64-revB.xml
flagsurl001 = http://www.spec.org/cpu2006/flags/PlatformHitachi.xml